commit 4405d8c

linux-headers: build on riscv64

add riscv64 to arches and generated riscv.lua, just like with aarch64
and x86_64.

1@@ -1,6 +1,7 @@
2 local arch = ({
3 	aarch64='arm64',
4 	x86_64='x86',
5+	riscv64='riscv',
6 })[config.target.platform:match('[^-]*')]
7 sub('tools.ninja', function()
8 	toolchain(config.host)

 1@@ -0,0 +1,34 @@
 2+return {
 3+	-- <cd src/arch/riscv/include/uapi && find * -name '*.h' -exec printf "\t'%s',\n" {} + | LC_COLLATE=C sort
 4+	'asm/auxvec.h',
 5+	'asm/bitsperlong.h',
 6+	'asm/bpf_perf_event.h',
 7+	'asm/byteorder.h',
 8+	'asm/elf.h',
 9+	'asm/hwcap.h',
10+	'asm/hwprobe.h',
11+	'asm/kvm.h',
12+	'asm/perf_regs.h',
13+	'asm/ptrace.h',
14+	'asm/setup.h',
15+	'asm/sigcontext.h',
16+	'asm/ucontext.h',
17+	'asm/unistd.h',
18+	'asm/vendor/mips.h',
19+	'asm/vendor/sifive.h',
20+	'asm/vendor/thead.h',
21+	unistd = {
22+		-- arch/riscv/kernel/Makefile.syscalls
23+		{
24+			dst='unistd_32.h',
25+			src='scripts/syscall.tbl',
26+			abi='common|32|riscv|memfd_secret',
27+		},
28+		{
29+			dst='unistd_64.h',
30+			src='scripts/syscall.tbl',
31+			abi='common|64|riscv|rlimit|memfd_secret',
32+		},
33+	},
34+	generic={},
35+}