(uxn.c) Housekeeping - pita/uxn12@419ff65

commit `419ff65`

Devine Lu Linvega · 2024-07-02 04:31:09 +0000 UTC

parent a3d0fc8

(uxn.c) Housekeeping

2 files changed, +28, -28

M src/devices/system.c

M src/uxn.c

M src/devices/system.c

+2, -2

 1@@ -101,9 +101,9 @@ system_dei(Uint8 addr)
 2 }
 3 
 4 void
 5-system_deo(Uint8 addr)
 6+system_deo(Uint8 port)
 7 {
 8-	switch(addr) {
 9+	switch(port) {
10 	case 0x3:
11 		Uint16 addr = PEEK2(uxn.dev + 2);
12 		if(uxn.ram[addr] == 0x0) {

M src/uxn.c

+26, -26

 1@@ -11,28 +11,30 @@ THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 2 WITH REGARD TO THIS SOFTWARE.
 3 */
 4 
 5-#define FLP { s = ins & 0x40 ? &uxn.wst : &uxn.rst; }
 6 #define JMP(x) { if(m2) pc = (x); else pc += (Sint8)(x); }
 7-#define PO1(o) { o = s->dat[--*sp]; }
 8-#define PO2(o) { o = s->dat[--*sp] | (s->dat[--*sp] << 8); }
 9 #define POx(o) { if(m2) { PO2(o) } else PO1(o) }
10-#define PU1(y) { s->dat[s->ptr++] = (y); }
11-#define PU2(y) { tt = (y); s->dat[s->ptr++] = tt >> 0x8; s->dat[s->ptr++] = tt; }
12 #define PUx(y) { if(m2) { PU2(y) } else PU1(y) }
13-#define PEK(o, x, r) { if(m2) { r = (x); o = uxn.ram[r++] << 8 | uxn.ram[r]; } else o = uxn.ram[(x)]; }
14-#define POK(x, y, r) { if(m2) { r = (x); uxn.ram[r++] = y >> 8; uxn.ram[r] = y; } else uxn.ram[(x)] = (y); }
15 #define DEI(o, p) { if(m2) { o = (emu_dei(p) << 8) | emu_dei(p + 1); } else o = emu_dei(p); }
16 #define DEO(p, y) { if(m2) { emu_deo(p, y >> 8); emu_deo(p + 1, y); } else emu_deo(p, y); }
17+#define PEK(o, x, r) { if(m2) { r = (x); o = uxn.ram[r++] << 8 | uxn.ram[r]; } else o = uxn.ram[(x)]; }
18+#define POK(x, y, r) { if(m2) { r = (x); uxn.ram[r++] = y >> 8; uxn.ram[r] = y; } else uxn.ram[(x)] = (y); }
19+#define PO1(o) { o = s->dat[--*sp]; }
20+#define PO2(o) { o = s->dat[--*sp] | (s->dat[--*sp] << 8); }
21+#define PU1(y) { s->dat[s->ptr++] = (y); }
22+#define PU2(y) { tt = (y); s->dat[s->ptr++] = tt >> 0x8; s->dat[s->ptr++] = tt; }
23+#define IMM(x, y) { uxn.x.dat[uxn.x.ptr++] = (y); }
24+#define JMI { pc += uxn.ram[pc++] << 8 | uxn.ram[pc++]; }
25+#define FLP { s = ins & 0x40 ? &uxn.wst : &uxn.rst; }
26 
27-#define OPC(op, body) { \
28-	case 0x00|0x00|0x00|op: {m2 = 0, s = &uxn.wst, sp = &s->ptr; body break;}\
29-	case 0x00|0x00|0x20|op: {m2 = 1, s = &uxn.wst, sp = &s->ptr; body break;}\
30-	case 0x00|0x40|0x00|op: {m2 = 0, s = &uxn.rst, sp = &s->ptr; body break;}\
31-	case 0x00|0x40|0x20|op: {m2 = 1, s = &uxn.rst, sp = &s->ptr; body break;}\
32-	case 0x80|0x00|0x00|op: {m2 = 0, s = &uxn.wst, kp = s->ptr, sp = &kp; body break;}\
33-	case 0x80|0x00|0x20|op: {m2 = 1, s = &uxn.wst, kp = s->ptr, sp = &kp; body break;}\
34-	case 0x80|0x40|0x00|op: {m2 = 0, s = &uxn.rst, kp = s->ptr, sp = &kp; body break;}\
35-	case 0x80|0x40|0x20|op: {m2 = 1, s = &uxn.rst, kp = s->ptr, sp = &kp; body break;}\
36+#define OPC(opc, body) {\
37+	case 0x00|opc: {int m2 = 0; Stack *s = &uxn.wst; Uint8 *sp = &uxn.wst.ptr; body break;}\
38+	case 0x20|opc: {int m2 = 1; Stack *s = &uxn.wst; Uint8 *sp = &uxn.wst.ptr; body break;}\
39+	case 0x40|opc: {int m2 = 0; Stack *s = &uxn.rst; Uint8 *sp = &uxn.rst.ptr; body break;}\
40+	case 0x60|opc: {int m2 = 1; Stack *s = &uxn.rst; Uint8 *sp = &uxn.rst.ptr; body break;}\
41+	case 0x80|opc: {int m2 = 0; Stack *s = &uxn.wst; Uint8 kp = uxn.wst.ptr, *sp = &kp; body break;}\
42+	case 0xa0|opc: {int m2 = 1; Stack *s = &uxn.wst; Uint8 kp = uxn.wst.ptr, *sp = &kp; body break;}\
43+	case 0xc0|opc: {int m2 = 0; Stack *s = &uxn.rst; Uint8 kp = uxn.rst.ptr, *sp = &kp; body break;}\
44+	case 0xe0|opc: {int m2 = 1; Stack *s = &uxn.rst; Uint8 kp = uxn.rst.ptr, *sp = &kp; body break;}\
45 }
46 
47 int
48@@ -41,18 +43,16 @@ uxn_eval(Uint16 pc)
49 	if(!pc || uxn.dev[0x0f]) return 0;
50 	for(;;) {
51 		Uint16 tt, a, b, c;
52-		Uint8 t, kp, *sp, ins = uxn.ram[pc++];
53-		int m2 = 0;
54-		Stack *s;
55+		Uint8 t, ins = uxn.ram[pc++];
56 		switch(ins) {
57 		/* BRK */ case 0x00: return 1;
58-		/* JCI */ case 0x20: if(uxn.wst.dat[--uxn.wst.ptr]) goto JMI; pc += 2; break;
59-		/* JMI */ case 0x40: JMI: a = uxn.ram[pc++] << 8 | uxn.ram[pc++]; pc += a; break;
60-		/* JSI */ case 0x60: tt = pc + 2; uxn.rst.dat[uxn.rst.ptr++] = tt >> 8; uxn.rst.dat[uxn.rst.ptr++] = tt; goto JMI;
61-		/* LIT2  */ case 0xa0: uxn.wst.dat[uxn.wst.ptr++] = uxn.ram[pc++], uxn.wst.dat[uxn.wst.ptr++] = uxn.ram[pc++]; break;
62-		/* LIT2r */ case 0xe0: uxn.rst.dat[uxn.rst.ptr++] = uxn.ram[pc++], uxn.rst.dat[uxn.rst.ptr++] = uxn.ram[pc++]; break;
63-		/* LIT   */ case 0x80: uxn.wst.dat[uxn.wst.ptr++] = uxn.ram[pc++]; break;
64-		/* LITr  */ case 0xc0: uxn.rst.dat[uxn.rst.ptr++] = uxn.ram[pc++]; break;
65+		/* JCI */ case 0x20: if(uxn.wst.dat[--uxn.wst.ptr]) { JMI break; } pc += 2; break;
66+		/* JMI */ case 0x40: JMI break;
67+		/* JSI */ case 0x60: tt = pc + 2; IMM(rst, tt >> 8) IMM(rst, tt) JMI break;
68+		/* LIT */ case 0x80: IMM(wst, uxn.ram[pc++]) break;
69+		/* LI2 */ case 0xa0: IMM(wst, uxn.ram[pc++]) IMM(wst, uxn.ram[pc++]); break;
70+		/* LIr */ case 0xc0: IMM(rst, uxn.ram[pc++]) break;
71+		/* L2r */ case 0xe0: IMM(rst, uxn.ram[pc++]) IMM(rst, uxn.ram[pc++]) break;
72 		/* INC */ OPC(0x01, POx(a) PUx(a + 1))
73 		/* POP */ OPC(0x02, POx(a))
74 		/* NIP */ OPC(0x03, POx(a) POx(b) PUx(a))

commit 419ff65

commit `419ff65`