commit f6627b0
Michael Forney
·
2013-06-14 03:42:47 +0000 UTC
parent 85150be
Rename i915 -> intel
+2,
-2
1@@ -22,12 +22,12 @@ libswc_la_SOURCES = \
2 egl.c egl.h
3
4 libswc_la_LIBADD = $(wayland_server_LIBS) $(udev_LIBS) $(xkbcommon_LIBS) \
5- $(drm_LIBS) $(gbm_LIBS) $(egl_LIBS) $(pixman_LIBS) i915/libi915.la
6+ $(drm_LIBS) $(gbm_LIBS) $(egl_LIBS) $(pixman_LIBS) intel/libintel.la
7
8 # testclient_SOURCES = \
9 # testclient.c
10 #
11 # testclient_LDADD = $(wayland_client_LIBS)
12
13-SUBDIRS = i915
14+SUBDIRS = intel
15
M
buffer.c
+2,
-2
1@@ -37,7 +37,7 @@ bool swc_buffer_initialize(struct swc_buffer * buffer, struct swc_drm * drm,
2
3 printf("width: %u, height: %u, pitch: %u, size: %u\n", width, height, buffer->pitch, size);
4
5- i915_bo_initialize(drm->fd, &buffer->bo, size);
6+ intel_bo_initialize(drm->fd, &buffer->bo, size);
7
8 if (drmModeAddFB(drm->fd, width, height, 24, 32, buffer->pitch,
9 buffer->bo.handle, &buffer->id) != 0)
10@@ -60,7 +60,7 @@ bool swc_buffer_initialize(struct swc_buffer * buffer, struct swc_drm * drm,
11 void swc_buffer_finish(struct swc_buffer * buffer, struct swc_drm * drm)
12 {
13 drmModeRmFB(drm->fd, buffer->id);
14- i915_bo_finalize(drm->fd, &buffer->bo);
15+ intel_bo_finalize(drm->fd, &buffer->bo);
16 }
17
18 void swc_buffer_ref_image(struct swc_buffer * buffer, struct swc_drm * drm)
M
buffer.h
+2,
-2
1@@ -2,7 +2,7 @@
2 #define SWC_BUFFER_H 1
3
4 #include "drm.h"
5-#include "i915/bo.h"
6+#include "intel/bo.h"
7
8 #include <stdbool.h>
9 #include <pixman.h>
10@@ -11,7 +11,7 @@ struct swc_buffer
11 {
12 uint32_t id;
13
14- struct i915_bo bo;
15+ struct intel_bo bo;
16
17 /* Pixman image using the mapped buffer for use with SHM. */
18 pixman_image_t * image;
+1,
-1
1@@ -32,6 +32,6 @@ PKG_CHECK_MODULES([wayland_client], [wayland-client])
2 dnl }}}
3
4 #AC_CONFIG_HEADERS([config.h])
5-AC_CONFIG_FILES([Makefile i915/Makefile])
6+AC_CONFIG_FILES([Makefile intel/Makefile])
7 AC_OUTPUT
8
+0,
-14
1@@ -1,14 +0,0 @@
2-# i915/Makefile.am
3-
4-AM_CFLAGS = $(drm_CFLAGS)
5-
6-noinst_LTLIBRARIES = libi915.la
7-
8-libi915_la_SOURCES = \
9- bo.c bo.h \
10- batch.c batch.h \
11- blt.h \
12- mi.h
13-
14-libi915_la_LIBADD = $(drm_LIBS)
15-
+14,
-0
1@@ -0,0 +1,14 @@
2+# intel/Makefile.am
3+
4+AM_CFLAGS = $(drm_CFLAGS)
5+
6+noinst_LTLIBRARIES = libintel.la
7+
8+libintel_la_SOURCES = \
9+ bo.c bo.h \
10+ batch.c batch.h \
11+ blt.h \
12+ mi.h
13+
14+libintel_la_LIBADD = $(drm_LIBS)
15+
R i915/batch.c =>
intel/batch.c
+17,
-17
1@@ -5,7 +5,7 @@
2 #include <stdio.h>
3 #include <xf86drm.h>
4
5-void i915_batch_initialize(struct i915_batch * batch, int drm)
6+void intel_batch_initialize(struct intel_batch * batch, int drm)
7 {
8 batch->relocation_count = 0;
9 batch->exec_object_count = 0;
10@@ -13,9 +13,9 @@ void i915_batch_initialize(struct i915_batch * batch, int drm)
11 batch->drm = drm;
12 }
13
14-void i915_batch_flush(struct i915_batch * batch)
15+void intel_batch_flush(struct intel_batch * batch)
16 {
17- struct i915_bo bo;
18+ struct intel_bo bo;
19 uint32_t index = batch->exec_object_count++;
20
21 mi_batch_buffer_end(batch);
22@@ -26,8 +26,8 @@ void i915_batch_flush(struct i915_batch * batch)
23
24 printf("command count: %u\n", batch->command_count);
25
26- i915_bo_initialize(batch->drm, &bo, batch->command_count << 2);
27- i915_bo_write(batch->drm, &bo, 0, batch->commands, batch->command_count << 2);
28+ intel_bo_initialize(batch->drm, &bo, batch->command_count << 2);
29+ intel_bo_write(batch->drm, &bo, 0, batch->commands, batch->command_count << 2);
30
31 printf("adding exec object with handle: %u\n", bo.handle);
32
33@@ -55,7 +55,7 @@ void i915_batch_flush(struct i915_batch * batch)
34 }
35 }
36
37- i915_bo_finalize(batch->drm, &bo);
38+ intel_bo_finalize(batch->drm, &bo);
39
40 /* Set offsets for all our execution objects (except the last one, our
41 * command object). */
42@@ -68,12 +68,12 @@ void i915_batch_flush(struct i915_batch * batch)
43 }
44
45 #if 0
46-uint32_t * i915_batch_alloc(struct i915_batch * batch, uint32_t size)
47+uint32_t * intel_batch_alloc(struct intel_batch * batch, uint32_t size)
48 {
49 uint32_t * commands;
50
51- if (i915_batch_space(batch) < size)
52- i915_batch_flush(batch);
53+ if (intel_batch_space(batch) < size)
54+ intel_batch_flush(batch);
55
56 commands = &batch->commands[batch->size];
57 batch->command_count += command_count;
58@@ -82,25 +82,25 @@ uint32_t * i915_batch_alloc(struct i915_batch * batch, uint32_t size)
59 }
60 #endif
61
62-void i915_batch_ensure_space(struct i915_batch * batch, uint32_t size)
63+void intel_batch_ensure_space(struct intel_batch * batch, uint32_t size)
64 {
65- if (i915_batch_space(batch) < size)
66- i915_batch_flush(batch);
67+ if (intel_batch_space(batch) < size)
68+ intel_batch_flush(batch);
69 }
70
71-uint32_t i915_batch_space(struct i915_batch * batch)
72+uint32_t intel_batch_space(struct intel_batch * batch)
73 {
74 /* XXX: reserved space */
75 return I915_MAX_COMMANDS - batch->command_count;
76 }
77
78-uint64_t i915_batch_add_relocation(struct i915_batch * batch,
79- uint32_t batch_offset, struct i915_bo * bo,
80+uint64_t intel_batch_add_relocation(struct intel_batch * batch,
81+ uint32_t batch_offset, struct intel_bo * bo,
82 uint32_t read_domains, uint32_t write_domain)
83 {
84 uint32_t index = batch->relocation_count++;
85
86- i915_batch_add_exec_object(batch, bo);
87+ intel_batch_add_exec_object(batch, bo);
88
89 printf("offset: %u\n", (batch->command_count + batch_offset) << 2);
90 printf("current: %u\n", *((uint32_t *)(((void *) batch->commands) + ((batch->command_count + batch_offset) << 2))));
91@@ -119,7 +119,7 @@ uint64_t i915_batch_add_relocation(struct i915_batch * batch,
92 return bo->last_offset;
93 }
94
95-void i915_batch_add_exec_object(struct i915_batch * batch, struct i915_bo * bo)
96+void intel_batch_add_exec_object(struct intel_batch * batch, struct intel_bo * bo)
97 {
98 uint32_t index = batch->exec_object_count++;
99
R i915/batch.h =>
intel/batch.h
+11,
-11
1@@ -13,7 +13,7 @@
2 #define I915_MAX_RELOCATIONS (1 << 11)
3 #define I915_MAX_EXEC_OBJECTS (1 << 11)
4
5-struct i915_batch
6+struct intel_batch
7 {
8 int drm;
9
10@@ -29,34 +29,34 @@ struct i915_batch
11 uint32_t command_count;
12 };
13
14-void i915_batch_initialize(struct i915_batch * batch, int drm);
15+void intel_batch_initialize(struct intel_batch * batch, int drm);
16
17-void i915_batch_flush(struct i915_batch * batch);
18+void intel_batch_flush(struct intel_batch * batch);
19
20-void i915_batch_ensure_space(struct i915_batch * batch, uint32_t size);
21+void intel_batch_ensure_space(struct intel_batch * batch, uint32_t size);
22
23-uint32_t i915_batch_space(struct i915_batch * batch);
24+uint32_t intel_batch_space(struct intel_batch * batch);
25
26-static inline void i915_batch_add_dword(struct i915_batch * batch,
27+static inline void intel_batch_add_dword(struct intel_batch * batch,
28 uint32_t dword)
29 {
30 batch->commands[batch->command_count++] = dword;
31 }
32
33-static inline void i915_batch_add_dwords(struct i915_batch * batch, uint32_t count, ...)
34+static inline void intel_batch_add_dwords(struct intel_batch * batch, uint32_t count, ...)
35 {
36 va_list dwords;
37 va_start(dwords, count);
38 while (count--)
39- i915_batch_add_dword(batch, va_arg(dwords, int));
40+ intel_batch_add_dword(batch, va_arg(dwords, int));
41 va_end(dwords);
42 }
43
44-uint64_t i915_batch_add_relocation(struct i915_batch * batch,
45- uint32_t batch_offset, struct i915_bo * bo,
46+uint64_t intel_batch_add_relocation(struct intel_batch * batch,
47+ uint32_t batch_offset, struct intel_bo * bo,
48 uint32_t read_domains, uint32_t write_domain);
49
50-void i915_batch_add_exec_object(struct i915_batch * batch, struct i915_bo * bo);
51+void intel_batch_add_exec_object(struct intel_batch * batch, struct intel_bo * bo);
52
53 #endif
54
R i915/blt.h =>
intel/blt.h
+16,
-16
1@@ -1,8 +1,8 @@
2 #ifndef SWC_I915_BLT_H
3 #define SWC_I915_BLT_H 1
4
5-#include "i915/bo.h"
6-#include "i915/batch.h"
7+#include "intel/bo.h"
8+#include "intel/batch.h"
9
10 #define BR00_CLIENT_2D 0x2
11
12@@ -99,16 +99,16 @@ static inline uint32_t br26(uint16_t source_y1, uint16_t source_x1)
13 ;
14 };
15
16-static inline void xy_src_copy_blt(struct i915_batch * batch,
17- struct i915_bo * src, uint16_t src_pitch,
18+static inline void xy_src_copy_blt(struct intel_batch * batch,
19+ struct intel_bo * src, uint16_t src_pitch,
20 uint16_t src_x, uint16_t src_y,
21- struct i915_bo * dst, uint16_t dst_pitch,
22+ struct intel_bo * dst, uint16_t dst_pitch,
23 uint16_t dst_x, uint16_t dst_y,
24 uint16_t width, uint16_t height)
25 {
26 #if 0
27- i915_batch_add_dword(batch,
28- uint32_t * commands = i915_batch_alloc(batch, 8);
29+ intel_batch_add_dword(batch,
30+ uint32_t * commands = intel_batch_alloc(batch, 8);
31 commands = (uint32_t *)
32 *commands++ = br00(BR00_CLIENT_2D, BR00_OPCODE_XY_SRC_COPY_BLT,
33 BR00_32BPP_BYTE_MASK_ALPHA | BR00_32BPP_BYTE_MASK_COLOR,
34@@ -126,15 +126,15 @@ static inline void xy_src_copy_blt(struct i915_batch * batch,
35
36 uint32_t dst_address, src_address;
37
38- i915_batch_ensure_space(batch, 8);
39+ intel_batch_ensure_space(batch, 8);
40
41- dst_address = i915_batch_add_relocation(batch, 4, dst,
42+ dst_address = intel_batch_add_relocation(batch, 4, dst,
43 I915_GEM_DOMAIN_RENDER,
44 I915_GEM_DOMAIN_RENDER);
45- src_address = i915_batch_add_relocation(batch, 7, src,
46+ src_address = intel_batch_add_relocation(batch, 7, src,
47 I915_GEM_DOMAIN_RENDER, 0);
48
49- i915_batch_add_dwords(batch, 8,
50+ intel_batch_add_dwords(batch, 8,
51 br00(BR00_CLIENT_2D, BR00_OPCODE_XY_SRC_COPY_BLT,
52 BR00_32BPP_BYTE_MASK_ALPHA | BR00_32BPP_BYTE_MASK_COLOR,
53 false, false, 6),
54@@ -149,21 +149,21 @@ static inline void xy_src_copy_blt(struct i915_batch * batch,
55 );
56 }
57
58-static inline void xy_color_blt(struct i915_batch * batch,
59- struct i915_bo * dst, uint16_t dst_pitch,
60+static inline void xy_color_blt(struct intel_batch * batch,
61+ struct intel_bo * dst, uint16_t dst_pitch,
62 uint16_t dst_x, uint16_t dst_y,
63 uint16_t width, uint16_t height,
64 uint32_t color)
65 {
66 uint32_t dst_address;
67
68- i915_batch_ensure_space(batch, 6);
69+ intel_batch_ensure_space(batch, 6);
70
71- dst_address = i915_batch_add_relocation(batch, 4, dst,
72+ dst_address = intel_batch_add_relocation(batch, 4, dst,
73 I915_GEM_DOMAIN_RENDER,
74 I915_GEM_DOMAIN_RENDER);
75
76- i915_batch_add_dwords(batch, 6,
77+ intel_batch_add_dwords(batch, 6,
78 br00(BR00_CLIENT_2D, BR00_OPCODE_XY_COLOR_BLT,
79 BR00_32BPP_BYTE_MASK_ALPHA | BR00_32BPP_BYTE_MASK_COLOR,
80 false, false, 4),
R i915/bo.c =>
intel/bo.c
+3,
-3
1@@ -4,7 +4,7 @@
2 #include <xf86drm.h>
3 #include <libdrm/i915_drm.h>
4
5-bool i915_bo_initialize(int drm, struct i915_bo * bo, uint32_t size)
6+bool intel_bo_initialize(int drm, struct intel_bo * bo, uint32_t size)
7 {
8 struct drm_i915_gem_create create_arg = { .size = size };
9
10@@ -26,14 +26,14 @@ bool i915_bo_initialize(int drm, struct i915_bo * bo, uint32_t size)
11 return false;
12 }
13
14-void i915_bo_finalize(int drm, struct i915_bo * bo)
15+void intel_bo_finalize(int drm, struct intel_bo * bo)
16 {
17 struct drm_gem_close close_arg = { .handle = bo->handle };
18
19 drmIoctl(drm, DRM_IOCTL_GEM_CLOSE, &close_arg);
20 }
21
22-void i915_bo_write(int drm, struct i915_bo * bo, uint32_t offset,
23+void intel_bo_write(int drm, struct intel_bo * bo, uint32_t offset,
24 void * data, size_t size)
25 {
26 struct drm_i915_gem_pwrite pwrite_arg = {
R i915/bo.h =>
intel/bo.h
+4,
-4
1@@ -5,7 +5,7 @@
2 #include <stdint.h>
3 #include <stdbool.h>
4
5-struct i915_bo
6+struct intel_bo
7 {
8 uint32_t handle;
9 uint32_t size;
10@@ -13,11 +13,11 @@ struct i915_bo
11 uint64_t last_offset;
12 };
13
14-bool i915_bo_initialize(int drm, struct i915_bo * bo, uint32_t size);
15+bool intel_bo_initialize(int drm, struct intel_bo * bo, uint32_t size);
16
17-void i915_bo_finalize(int drm, struct i915_bo * bo);
18+void intel_bo_finalize(int drm, struct intel_bo * bo);
19
20-void i915_bo_write(int drm, struct i915_bo * bo, uint32_t offset,
21+void intel_bo_write(int drm, struct intel_bo * bo, uint32_t offset,
22 void * data, size_t size);
23
24 #endif
R i915/mi.h =>
intel/mi.h
+11,
-11
1@@ -14,11 +14,11 @@
2 #define MI_OPCODE_FLUSH_DW 0x04
3 #define MI_OPCODE_BATCH_BUFFER_START 0x31
4
5-static inline void mi_noop(struct i915_batch * batch,
6+static inline void mi_noop(struct intel_batch * batch,
7 bool identification_number_write_enable,
8 uint32_t identification_number)
9 {
10- i915_batch_add_dword(batch,
11+ intel_batch_add_dword(batch,
12 COMMAND_TYPE_MI << 29 /* 31:29 */
13 | MI_OPCODE_NOOP << 23 /* 28:23 */
14 | identification_number_write_enable << 22 /* 22 */
15@@ -26,7 +26,7 @@ static inline void mi_noop(struct i915_batch * batch,
16 );
17 }
18
19-static inline void mi_flush(struct i915_batch * batch,
20+static inline void mi_flush(struct intel_batch * batch,
21 bool protected_memory_enable,
22 bool indirect_state_pointers_disable,
23 bool generic_media_state_clear,
24@@ -34,7 +34,7 @@ static inline void mi_flush(struct i915_batch * batch,
25 bool render_cache_flush_inhibit,
26 bool state_cache_invalidate)
27 {
28- i915_batch_add_dword(batch,
29+ intel_batch_add_dword(batch,
30 COMMAND_TYPE_MI << 29 /* 31:29 */
31 | MI_OPCODE_FLUSH << 23 /* 28:23 */
32 /* 22:7 */
33@@ -48,9 +48,9 @@ static inline void mi_flush(struct i915_batch * batch,
34 );
35 }
36
37-static inline void mi_flush_dw(struct i915_batch * batch)
38+static inline void mi_flush_dw(struct intel_batch * batch)
39 {
40- i915_batch_add_dwords(batch, 4,
41+ intel_batch_add_dwords(batch, 4,
42 COMMAND_TYPE_MI << 29
43 | MI_OPCODE_FLUSH_DW << 23
44 | 2
45@@ -61,25 +61,25 @@ static inline void mi_flush_dw(struct i915_batch * batch)
46 );
47 }
48
49-static inline void mi_batch_buffer_end(struct i915_batch * batch)
50+static inline void mi_batch_buffer_end(struct intel_batch * batch)
51 {
52 /* XXX: semaphore data dword / semaphore address */
53- i915_batch_add_dword(batch,
54+ intel_batch_add_dword(batch,
55 COMMAND_TYPE_MI << 29 /* 31:29 */
56 | MI_OPCODE_BATCH_BUFFER_END << 23 /* 28:23 */
57 /* 22:0 */
58 );
59 }
60
61-static inline void mi_batch_buffer_start(struct i915_batch * batch,
62+static inline void mi_batch_buffer_start(struct intel_batch * batch,
63 bool encrypted_memory_enable,
64 bool clear_command_buffer_enable,
65 bool buffer_non_secure,
66 uint32_t buffer_address)
67 {
68- i915_batch_ensure_space(batch, 2);
69+ intel_batch_ensure_space(batch, 2);
70
71- i915_batch_add_dwords(batch, 2,
72+ intel_batch_add_dwords(batch, 2,
73 COMMAND_TYPE_MI << 29 /* 31:29 */
74 | MI_OPCODE_BATCH_BUFFER_START << 23 /* 28:23 */
75 /* 22:13 */
+6,
-6
1@@ -1,6 +1,6 @@
2 #include "renderer.h"
3-#include "i915/blt.h"
4-#include "i915/mi.h"
5+#include "intel/blt.h"
6+#include "intel/mi.h"
7
8 #include <stdio.h>
9 #include <GLES2/gl2.h>
10@@ -77,7 +77,7 @@ static void repaint_surface_for_output(struct swc_renderer * renderer,
11 else
12 {
13 /*
14- struct i915_bo * src = &surface->renderer_state.drm.bo;
15+ struct intel_bo * src = &surface->renderer_state.drm.bo;
16 uint32_t src_pitch = surface->renderer_state.drm.pitch;
17
18 xy_src_copy_blt(&renderer->batch, src, src_pitch, 0, 0,
19@@ -92,7 +92,7 @@ bool swc_renderer_initialize(struct swc_renderer * renderer,
20 {
21 renderer->drm = drm;
22
23- i915_batch_initialize(&renderer->batch, drm->fd);
24+ intel_batch_initialize(&renderer->batch, drm->fd);
25
26 return true;
27 }
28@@ -123,7 +123,7 @@ void swc_renderer_repaint_output(struct swc_renderer * renderer,
29
30 //mi_flush(&renderer->batch, false, false, false, false, false, false);
31
32- i915_batch_flush(&renderer->batch);
33+ intel_batch_flush(&renderer->batch);
34 }
35
36 void swc_renderer_attach(struct swc_renderer * renderer,
37@@ -159,7 +159,7 @@ void swc_renderer_attach(struct swc_renderer * renderer,
38 struct intel_region * region = image->region;
39 drm_intel_bo * bo = region->bo;
40
41- surface->renderer_state.drm.bo = (struct i915_bo) {
42+ surface->renderer_state.drm.bo = (struct intel_bo) {
43 .handle = bo->handle
44 };
45
+2,
-2
1@@ -4,13 +4,13 @@
2 #include "output.h"
3 #include "surface.h"
4 #include "drm.h"
5-#include "i915/batch.h"
6+#include "intel/batch.h"
7
8 struct swc_renderer
9 {
10 struct swc_drm * drm;
11
12- struct i915_batch batch;
13+ struct intel_batch batch;
14 };
15
16 bool swc_renderer_initialize(struct swc_renderer * renderer,
+2,
-2
1@@ -1,7 +1,7 @@
2 #ifndef SWC_SURFACE_STATE_H
3 #define SWC_SURFACE_STATE_H 1
4
5-#include "i915/bo.h"
6+#include "intel/bo.h"
7
8 #include <wayland-server.h>
9 #include <pixman.h>
10@@ -14,7 +14,7 @@ union swc_renderer_surface_state
11 } shm;
12 struct
13 {
14- struct i915_bo bo;
15+ struct intel_bo bo;
16 uint32_t pitch;
17 } drm;
18 };