commit f920a5d
Michael Forney
·
2013-07-13 19:51:58 +0000 UTC
parent a58644c
libintelbatch is now it's own package
10 files changed,
+11,
-423
M
drm.c
+4,
-3
1@@ -1,7 +1,7 @@
2 # swc: Makefile.am
3
4 ACLOCAL_AMFLAGS = -I m4
5-AM_CFLAGS = $(pixman_CFLAGS) $(drm_CFLAGS)
6+AM_CFLAGS = $(pixman_CFLAGS) $(drm_CFLAGS) $(intelbatch_CFLAGS)
7
8 lib_LTLIBRARIES = libswc.la
9
10@@ -29,7 +29,8 @@ libswc_la_SOURCES = \
11
12 libswc_la_LIBADD = $(wayland_server_LIBS) $(udev_LIBS) $(xkbcommon_LIBS) \
13 $(drm_LIBS) $(drm_intel_LIBS) $(gbm_LIBS) $(egl_LIBS) \
14- $(pixman_LIBS) intel/libintel.la launch/liblaunch-protocol.la
15+ $(pixman_LIBS) $(intelbatch_LIBS) \
16+ launch/liblaunch-protocol.la
17
18-SUBDIRS = launch intel
19+SUBDIRS = launch
20
+2,
-1
1@@ -25,6 +25,7 @@ PKG_CHECK_MODULES([udev], [libudev])
2 PKG_CHECK_MODULES([xkbcommon], [xkbcommon])
3 PKG_CHECK_MODULES([drm], [libdrm])
4 PKG_CHECK_MODULES([drm_intel], [libdrm_intel])
5+PKG_CHECK_MODULES([intelbatch], [intelbatch])
6 PKG_CHECK_MODULES([gbm], [gbm])
7 PKG_CHECK_MODULES([egl], [egl])
8 PKG_CHECK_MODULES([pixman], [pixman-1])
9@@ -32,6 +33,6 @@ PKG_CHECK_MODULES([pixman], [pixman-1])
10 PKG_CHECK_MODULES([wayland_client], [wayland-client])
11 dnl }}}
12
13-AC_CONFIG_FILES([Makefile intel/Makefile launch/Makefile])
14+AC_CONFIG_FILES([Makefile launch/Makefile])
15 AC_OUTPUT
16
M
drm.c
+1,
-1
1@@ -8,13 +8,13 @@
2 #include <xf86drm.h>
3 #include <libdrm/i915_drm.h>
4 #include <libdrm/intel_bufmgr.h>
5+#include <intelbatch/batch.h>
6 //#include <xf86drmMode.h>
7 #include <wayland-util.h>
8
9 #include "drm.h"
10 #include "output.h"
11 #include "event.h"
12-#include "intel/batch.h"
13
14 static struct udev_device * find_primary_drm_device(struct udev * udev,
15 const char * seat)
+0,
-13
1@@ -1,13 +0,0 @@
2-# intel/Makefile.am
3-
4-AM_CFLAGS = $(drm_CFLAGS)
5-
6-noinst_LTLIBRARIES = libintel.la
7-
8-libintel_la_SOURCES = \
9- batch.c batch.h \
10- blt.h \
11- mi.h
12-
13-libintel_la_LIBADD = $(drm_LIBS)
14-
+0,
-72
1@@ -1,72 +0,0 @@
2-/* swc: intel/batch.c
3- *
4- * Copyright (c) 2013 Michael Forney
5- *
6- * Permission is hereby granted, free of charge, to any person obtaining a copy
7- * of this software and associated documentation files (the "Software"), to deal
8- * in the Software without restriction, including without limitation the rights
9- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10- * copies of the Software, and to permit persons to whom the Software is
11- * furnished to do so, subject to the following conditions:
12- *
13- * The above copyright notice and this permission notice shall be included in
14- * all copies or substantial portions of the Software.
15- *
16- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22- * SOFTWARE.
23- */
24-
25-#include "batch.h"
26-#include "mi.h"
27-
28-#include <stdio.h>
29-#include <xf86drm.h>
30-
31-void intel_batch_initialize(struct intel_batch * batch,
32- drm_intel_bufmgr * bufmgr)
33-{
34- batch->bufmgr = bufmgr;
35- batch->command_count = 0;
36-
37- /* Alignment (4096) is not used */
38- batch->bo = drm_intel_bo_alloc(bufmgr, "batchbuffer",
39- sizeof batch->commands, 4096);
40-}
41-
42-void intel_batch_finalize(struct intel_batch * batch)
43-{
44- drm_intel_bo_unreference(batch->bo);
45-}
46-
47-void intel_batch_flush(struct intel_batch * batch)
48-{
49- if (batch->command_count == 0)
50- return;
51-
52- intel_batch_add_dword(batch, MI_BATCH_BUFFER_END);
53-
54- /* Pad the batch buffer to the next quad-word. */
55- if (batch->command_count & 1)
56- intel_batch_add_dword(batch, MI_NOOP);
57-
58- drm_intel_bo_subdata(batch->bo, 0, batch->command_count << 2,
59- batch->commands);
60- int ret = drm_intel_bo_exec(batch->bo, batch->command_count << 2, NULL, 0,
61- 0);
62- //printf("ret: %d\n", ret);
63- drm_intel_gem_bo_clear_relocs(batch->bo, 0);
64-
65- batch->command_count = 0;
66-}
67-
68-void intel_batch_ensure_space(struct intel_batch * batch, uint32_t size)
69-{
70- if (intel_batch_space(batch) < size)
71- intel_batch_flush(batch);
72-}
73-
+0,
-82
1@@ -1,82 +0,0 @@
2-/* swc: intel/batch.h
3- *
4- * Copyright (c) 2013 Michael Forney
5- *
6- * Permission is hereby granted, free of charge, to any person obtaining a copy
7- * of this software and associated documentation files (the "Software"), to deal
8- * in the Software without restriction, including without limitation the rights
9- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10- * copies of the Software, and to permit persons to whom the Software is
11- * furnished to do so, subject to the following conditions:
12- *
13- * The above copyright notice and this permission notice shall be included in
14- * all copies or substantial portions of the Software.
15- *
16- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22- * SOFTWARE.
23- */
24-
25-#ifndef SWC_INTEL_BATCH_H
26-#define SWC_INTEL_BATCH_H 1
27-
28-#include <stdlib.h>
29-#include <stdint.h>
30-#include <stdarg.h>
31-
32-#include <intel_bufmgr.h>
33-
34-#define INTEL_MAX_COMMANDS (1 << 13)
35-
36-struct intel_batch
37-{
38- drm_intel_bufmgr * bufmgr;
39- drm_intel_bo * bo;
40-
41- uint32_t commands[INTEL_MAX_COMMANDS];
42- uint32_t command_count;
43-};
44-
45-void intel_batch_initialize(struct intel_batch * batch, drm_intel_bufmgr * bufmgr);
46-
47-void intel_batch_finalize(struct intel_batch * batch);
48-
49-void intel_batch_flush(struct intel_batch * batch);
50-
51-void intel_batch_ensure_space(struct intel_batch * batch, uint32_t size);
52-
53-static inline uint32_t intel_batch_space(struct intel_batch * batch)
54-{
55- /* XXX: reserved space */
56- return INTEL_MAX_COMMANDS - batch->command_count;
57-}
58-
59-
60-static inline void intel_batch_add_dword(struct intel_batch * batch,
61- uint32_t dword)
62-{
63- batch->commands[batch->command_count++] = dword;
64-}
65-
66-static inline void intel_batch_add_dwords(struct intel_batch * batch,
67- uint32_t count, ...)
68-{
69- va_list dwords;
70- va_start(dwords, count);
71- while (count--)
72- intel_batch_add_dword(batch, va_arg(dwords, uint32_t));
73- va_end(dwords);
74-}
75-
76-static inline uint32_t intel_batch_offset(struct intel_batch * batch,
77- uint32_t command_index)
78-{
79- return (batch->command_count + command_index) << 2;
80-}
81-
82-#endif
83-
+0,
-193
1@@ -1,193 +0,0 @@
2-/* swc: intel/blt.h
3- *
4- * Copyright (c) 2013 Michael Forney
5- *
6- * Permission is hereby granted, free of charge, to any person obtaining a copy
7- * of this software and associated documentation files (the "Software"), to deal
8- * in the Software without restriction, including without limitation the rights
9- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10- * copies of the Software, and to permit persons to whom the Software is
11- * furnished to do so, subject to the following conditions:
12- *
13- * The above copyright notice and this permission notice shall be included in
14- * all copies or substantial portions of the Software.
15- *
16- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22- * SOFTWARE.
23- */
24-
25-#ifndef SWC_INTEL_BLT_H
26-#define SWC_INTEL_BLT_H 1
27-
28-#include "batch.h"
29-
30-#include <i915_drm.h>
31-
32-#define COMMAND_TYPE_2D 0x2
33-
34-#define BLT_OPCODE_XY_COLOR_BLT 0x50
35-#define BLT_OPCODE_XY_SRC_COPY_BLT 0x53
36-
37-#define BR00_32BPP_BYTE_MASK_ALPHA (1 << 0)
38-#define BR00_32BPP_BYTE_MASK_COLOR (1 << 1)
39-
40-static inline uint32_t br00(uint8_t client, uint8_t opcode,
41- uint8_t mask_32bpp,
42- bool src_tiling_enable, bool dst_tiling_enable,
43- uint8_t dword_length)
44-{
45- return client << 29 /* 31:29 */
46- | opcode << 22 /* 28:22 */
47- | mask_32bpp << 20 /* 21:20 */
48- /* 19:16 */
49- | src_tiling_enable << 15 /* 15 */
50- /* 14:12 */
51- | dst_tiling_enable << 11 /* 11 */
52- /* 10:8 */
53- | dword_length << 0 /* 7:0 */
54- ;
55-}
56-
57-static inline uint32_t br09(uint32_t destination_address)
58-{
59- /* 31:29 */
60- return destination_address << 0 /* 28:0 */
61- ;
62-}
63-
64-static inline uint32_t br11(uint16_t source_pitch)
65-{
66- /* 31:16 */
67- return source_pitch << 0 /* 15:0 */
68- ;
69-}
70-
71-static inline uint32_t br12(uint32_t source_address)
72-{
73- /* 31:29 */
74- return source_address << 0 /* 28:0 */
75- ;
76-}
77-
78-#define BR13_COLOR_DEPTH_8BIT 0x0
79-#define BR13_COLOR_DEPTH_16BIT_565 0x1
80-#define BR13_COLOR_DEPTH_16BIT_1555 0x2
81-#define BR13_COLOR_DEPTH_32BIT 0x3
82-
83-/* Commonly used raster operations */
84-#define BR13_RASTER_OPERATION_SOURCE 0xcc
85-#define BR13_RASTER_OPERATION_PATTERN 0xf0
86-
87-static inline uint32_t br13(bool clipping_enable, uint8_t color_depth,
88- uint8_t raster_operation,
89- uint16_t destination_pitch)
90-{
91- /* 31 */
92- return clipping_enable << 30 /* 30 */
93- /* 29:26 */
94- | color_depth << 24 /* 25:24 */
95- | raster_operation << 16 /* 23:16 */
96- | destination_pitch << 0 /* 15:0 */
97- ;
98-}
99-
100-static inline uint32_t br16(uint32_t color)
101-{
102- return color << 0 /* 31:0 */
103- ;
104-}
105-
106-static inline uint32_t br22(uint16_t destination_y1, uint16_t destination_x1)
107-{
108- return destination_y1 << 16 /* 31:16 */
109- | destination_x1 << 0 /* 15:0 */
110- ;
111-}
112-
113-static inline uint32_t br23(uint16_t destination_y2, uint16_t destination_x2)
114-{
115- return destination_y2 << 16 /* 31:16 */
116- | destination_x2 << 0 /* 15:0 */
117- ;
118-}
119-
120-static inline uint32_t br26(uint16_t source_y1, uint16_t source_x1)
121-{
122- return source_y1 << 16 /* 31:16 */
123- | source_x1 << 0 /* 15:0 */
124- ;
125-};
126-
127-static inline void xy_src_copy_blt(struct intel_batch * batch,
128- drm_intel_bo * src, uint16_t src_pitch,
129- uint16_t src_x, uint16_t src_y,
130- drm_intel_bo * dst, uint16_t dst_pitch,
131- uint16_t dst_x, uint16_t dst_y,
132- uint16_t width, uint16_t height)
133-{
134- uint32_t src_tiling_mode, dst_tiling_mode, swizzle;
135-
136- intel_batch_ensure_space(batch, 8);
137-
138- drm_intel_bo_get_tiling(dst, &dst_tiling_mode, &swizzle);
139- drm_intel_bo_get_tiling(src, &src_tiling_mode, &swizzle);
140-
141- drm_intel_bo_emit_reloc_fence
142- (batch->bo, intel_batch_offset(batch, 4), dst, 0,
143- I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER);
144- drm_intel_bo_emit_reloc_fence
145- (batch->bo, intel_batch_offset(batch, 7), src, 0,
146- I915_GEM_DOMAIN_RENDER, 0);
147-
148- intel_batch_add_dwords(batch, 8,
149- br00(COMMAND_TYPE_2D, BLT_OPCODE_XY_SRC_COPY_BLT,
150- BR00_32BPP_BYTE_MASK_ALPHA | BR00_32BPP_BYTE_MASK_COLOR,
151- src_tiling_mode != I915_TILING_NONE,
152- dst_tiling_mode != I915_TILING_NONE, 6),
153- br13(false, BR13_COLOR_DEPTH_32BIT, BR13_RASTER_OPERATION_SOURCE,
154- dst_pitch >> 2),
155- br22(dst_y, dst_x),
156- br23(dst_y + height, dst_x + width),
157- br09(dst->offset),
158- br26(src_y, src_x),
159- br11(src_pitch >> 2),
160- br12(src->offset)
161- );
162-}
163-
164-static inline void xy_color_blt(struct intel_batch * batch,
165- drm_intel_bo * dst, uint16_t dst_pitch,
166- uint16_t dst_x1, uint16_t dst_y1,
167- uint16_t dst_x2, uint16_t dst_y2,
168- uint32_t color)
169-{
170- uint32_t tiling_mode, swizzle_mode;
171-
172- intel_batch_ensure_space(batch, 6);
173-
174- drm_intel_bo_get_tiling(dst, &tiling_mode, &swizzle_mode);
175-
176- drm_intel_bo_emit_reloc_fence
177- (batch->bo, intel_batch_offset(batch, 4), dst, 0,
178- I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER);
179-
180- intel_batch_add_dwords(batch, 6,
181- br00(COMMAND_TYPE_2D, BLT_OPCODE_XY_COLOR_BLT,
182- BR00_32BPP_BYTE_MASK_ALPHA | BR00_32BPP_BYTE_MASK_COLOR,
183- false, tiling_mode != I915_TILING_NONE, 4),
184- br13(false, BR13_COLOR_DEPTH_32BIT, BR13_RASTER_OPERATION_PATTERN,
185- dst_pitch >> 2),
186- br22(dst_y1, dst_x1),
187- br23(dst_y2, dst_x2),
188- br09(dst->offset),
189- br16(color)
190- );
191-}
192-
193-#endif
194-
+0,
-55
1@@ -1,55 +0,0 @@
2-/* swc: intel/mi.h
3- *
4- * Copyright (c) 2013 Michael Forney
5- *
6- * Permission is hereby granted, free of charge, to any person obtaining a copy
7- * of this software and associated documentation files (the "Software"), to deal
8- * in the Software without restriction, including without limitation the rights
9- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10- * copies of the Software, and to permit persons to whom the Software is
11- * furnished to do so, subject to the following conditions:
12- *
13- * The above copyright notice and this permission notice shall be included in
14- * all copies or substantial portions of the Software.
15- *
16- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22- * SOFTWARE.
23- */
24-
25-#ifndef SWC_INTEL_MI_H
26-#define SWC_INTEL_MI_H 1
27-
28-#include "batch.h"
29-
30-#include <stdint.h>
31-#include <stdbool.h>
32-
33-#define COMMAND_TYPE_MI 0x0
34-
35-#define MI_OP(opcode) ( \
36- COMMAND_TYPE_MI << 29 /* 31:29 */ \
37- | opcode << 23 /* 28:23 */ \
38-)
39-
40-#define MI_NOOP MI_OP(0x00)
41-#define MI_FLUSH MI_OP(0x04)
42-#define MI_BATCH_BUFFER_END MI_OP(0x0A)
43-
44-/* MI_NOOP */
45-#define MI_NOOP_IDENTIFICATION_NUMBER(number) (1 << 22 | number)
46-
47-/* MI_FLUSH */
48-#define MI_FLUSH_ENABLE_PROTECTED_MEMORY (1 << 6)
49-#define MI_FLUSH_DISABLE_INDIRECT_STATE_POINTERS (1 << 5)
50-#define MI_FLUSH_CLEAR_GENERIC_MEDIA_STATE (1 << 3)
51-#define MI_FLUSH_RESET_GLOBAL_SNAPSHOT_COUNT (1 << 3)
52-#define MI_FLUSH_INHIBIT_RENDER_CACHE_FLUSH (1 << 2)
53-#define MI_FLUSH_INVALIDATE_STATE_INSTRUCTION_CACHE (1 << 2)
54-
55-#endif
56-
+2,
-2
1@@ -1,11 +1,11 @@
2 #include "renderer.h"
3-#include "intel/blt.h"
4-#include "intel/mi.h"
5
6 #include <stdio.h>
7 #include <GLES2/gl2.h>
8 #include <libdrm/intel_bufmgr.h>
9 #include <libdrm/drm.h>
10+#include <intelbatch/blt.h>
11+#include <intelbatch/mi.h>
12 #include <xf86drm.h>
13
14 static inline uint32_t format_wayland_to_pixman(uint32_t wayland_format)
+2,
-1
1@@ -4,7 +4,8 @@
2 #include "output.h"
3 #include "surface.h"
4 #include "drm.h"
5-#include "intel/batch.h"
6+
7+#include <intelbatch/batch.h>
8
9 enum swc_renderer_context
10 {