1/* wld: intel/batch.c
2 *
3 * Copyright (c) 2013, 2014 Michael Forney
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a copy
6 * of this software and associated documentation files (the "Software"), to deal
7 * in the Software without restriction, including without limitation the rights
8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 * copies of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24#include "batch.h"
25#include "mi.h"
26
27#include <i915_drm.h>
28#include <stdlib.h>
29
30static const struct intel_device_info device_info_i965 = { .gen = 4 };
31static const struct intel_device_info device_info_g4x = { .gen = 4 };
32static const struct intel_device_info device_info_ilk = { .gen = 5 };
33static const struct intel_device_info device_info_snb_gt1 = { .gen = 6 };
34static const struct intel_device_info device_info_snb_gt2 = { .gen = 6 };
35static const struct intel_device_info device_info_ivb_gt1 = { .gen = 7 };
36static const struct intel_device_info device_info_ivb_gt2 = { .gen = 7 };
37static const struct intel_device_info device_info_byt = { .gen = 7 };
38static const struct intel_device_info device_info_hsw_gt1 = { .gen = 7 };
39static const struct intel_device_info device_info_hsw_gt2 = { .gen = 7 };
40static const struct intel_device_info device_info_hsw_gt3 = { .gen = 7 };
41static const struct intel_device_info device_info_bdw_gt1 = { .gen = 8 };
42static const struct intel_device_info device_info_bdw_gt2 = { .gen = 8 };
43static const struct intel_device_info device_info_bdw_gt3 = { .gen = 8 };
44static const struct intel_device_info device_info_chv = { .gen = 8 };
45static const struct intel_device_info device_info_skl_gt1 = { .gen = 9 };
46static const struct intel_device_info device_info_skl_gt2 = { .gen = 9 };
47static const struct intel_device_info device_info_skl_gt3 = { .gen = 9 };
48static const struct intel_device_info device_info_skl_gt4 = { .gen = 9 };
49static const struct intel_device_info device_info_bxt = { .gen = 9 };
50static const struct intel_device_info device_info_bxt_2x6 = { .gen = 9 };
51static const struct intel_device_info device_info_kbl_gt1 = { .gen = 9 };
52static const struct intel_device_info device_info_kbl_gt1_5 = { .gen = 9 };
53static const struct intel_device_info device_info_kbl_gt2 = { .gen = 9 };
54static const struct intel_device_info device_info_kbl_gt3 = { .gen = 9 };
55static const struct intel_device_info device_info_kbl_gt4 = { .gen = 9 };
56static const struct intel_device_info device_info_glk = { .gen = 9 };
57static const struct intel_device_info device_info_glk_2x6 = { .gen = 9 };
58static const struct intel_device_info device_info_cfl_gt1 = { .gen = 9 };
59static const struct intel_device_info device_info_cfl_gt2 = { .gen = 9 };
60static const struct intel_device_info device_info_cfl_gt3 = { .gen = 9 };
61static const struct intel_device_info device_info_cnl_2x8 = { .gen = 10 };
62static const struct intel_device_info device_info_cnl_3x8 = { .gen = 10 };
63static const struct intel_device_info device_info_cnl_4x8 = { .gen = 10 };
64static const struct intel_device_info device_info_cnl_5x8 = { .gen = 10 };
65
66static const struct intel_device_info *
67device_info(int device_id)
68{
69 switch (device_id) {
70#define CHIPSET(device_id, type, name) \
71 case device_id: \
72 return &device_info_##type;
73#include "i965_pci_ids.h"
74#undef CHIPSET
75 default:
76 return NULL;
77 }
78}
79
80bool
81intel_batch_initialize(struct intel_batch *batch,
82 drm_intel_bufmgr *bufmgr)
83{
84 int device_id = drm_intel_bufmgr_gem_get_devid(bufmgr);
85
86 batch->command_count = 0;
87 batch->device_info = device_info(device_id);
88
89 if (!batch->device_info)
90 return false;
91
92 /* Alignment argument (4096) is not used */
93 batch->bo = drm_intel_bo_alloc(bufmgr, "batchbuffer", sizeof batch->commands, 4096);
94
95 if (!batch->bo)
96 return false;
97
98 return true;
99}
100
101void
102intel_batch_finalize(struct intel_batch *batch)
103{
104 drm_intel_bo_unreference(batch->bo);
105}
106
107void
108intel_batch_flush(struct intel_batch *batch)
109{
110 if (batch->command_count == 0)
111 return;
112
113 intel_batch_add_dword(batch, MI_BATCH_BUFFER_END);
114
115 /* Pad the batch buffer to the next quad-word. */
116 if (batch->command_count & 1)
117 intel_batch_add_dword(batch, MI_NOOP);
118
119 drm_intel_bo_subdata(batch->bo, 0, batch->command_count << 2,
120 batch->commands);
121 drm_intel_bo_mrb_exec(batch->bo, batch->command_count << 2, NULL, 0, 0,
122 GEN(batch, 6) ? I915_EXEC_BLT
123 : I915_EXEC_DEFAULT);
124 drm_intel_gem_bo_clear_relocs(batch->bo, 0);
125 batch->command_count = 0;
126}
