intel: get updated PCI ids from mesa

commit `b4e902b`

Devin J. Pohly · 2017-10-31 18:32:02 +0000 UTC

parent d455967

intel: get updated PCI ids from mesa

Signed-off-by: Devin J. Pohly <djpohly@gmail.com>

2 files changed, +121, -0

M intel/batch.c

M intel/i965_pci_ids.h

M intel/batch.c

+24, -0

 1@@ -38,6 +38,30 @@ static const struct intel_device_info device_info_byt       = { .gen = 7 };
 2 static const struct intel_device_info device_info_hsw_gt1   = { .gen = 7 };
 3 static const struct intel_device_info device_info_hsw_gt2   = { .gen = 7 };
 4 static const struct intel_device_info device_info_hsw_gt3   = { .gen = 7 };
 5+static const struct intel_device_info device_info_bdw_gt1   = { .gen = 8 };
 6+static const struct intel_device_info device_info_bdw_gt2   = { .gen = 8 };
 7+static const struct intel_device_info device_info_bdw_gt3   = { .gen = 8 };
 8+static const struct intel_device_info device_info_chv       = { .gen = 8 };
 9+static const struct intel_device_info device_info_skl_gt1   = { .gen = 9 };
10+static const struct intel_device_info device_info_skl_gt2   = { .gen = 9 };
11+static const struct intel_device_info device_info_skl_gt3   = { .gen = 9 };
12+static const struct intel_device_info device_info_skl_gt4   = { .gen = 9 };
13+static const struct intel_device_info device_info_bxt       = { .gen = 9 };
14+static const struct intel_device_info device_info_bxt_2x6   = { .gen = 9 };
15+static const struct intel_device_info device_info_kbl_gt1   = { .gen = 9 };
16+static const struct intel_device_info device_info_kbl_gt1_5 = { .gen = 9 };
17+static const struct intel_device_info device_info_kbl_gt2   = { .gen = 9 };
18+static const struct intel_device_info device_info_kbl_gt3   = { .gen = 9 };
19+static const struct intel_device_info device_info_kbl_gt4   = { .gen = 9 };
20+static const struct intel_device_info device_info_glk       = { .gen = 9 };
21+static const struct intel_device_info device_info_glk_2x6   = { .gen = 9 };
22+static const struct intel_device_info device_info_cfl_gt1   = { .gen = 9 };
23+static const struct intel_device_info device_info_cfl_gt2   = { .gen = 9 };
24+static const struct intel_device_info device_info_cfl_gt3   = { .gen = 9 };
25+static const struct intel_device_info device_info_cnl_2x8   = { .gen = 10 };
26+static const struct intel_device_info device_info_cnl_3x8   = { .gen = 10 };
27+static const struct intel_device_info device_info_cnl_4x8   = { .gen = 10 };
28+static const struct intel_device_info device_info_cnl_5x8   = { .gen = 10 };
29 
30 static const struct intel_device_info * device_info(int device_id)
31 {

M intel/i965_pci_ids.h

+97, -0

  1@@ -91,3 +91,100 @@ CHIPSET(0x0F32, byt,     "Intel(R) Bay Trail")
  2 CHIPSET(0x0F33, byt,     "Intel(R) Bay Trail")
  3 CHIPSET(0x0157, byt,     "Intel(R) Bay Trail")
  4 CHIPSET(0x0155, byt,     "Intel(R) Bay Trail")
  5+CHIPSET(0x1602, bdw_gt1, "Intel(R) Broadwell GT1")
  6+CHIPSET(0x1606, bdw_gt1, "Intel(R) Broadwell GT1")
  7+CHIPSET(0x160A, bdw_gt1, "Intel(R) Broadwell GT1")
  8+CHIPSET(0x160B, bdw_gt1, "Intel(R) Broadwell GT1")
  9+CHIPSET(0x160D, bdw_gt1, "Intel(R) Broadwell GT1")
 10+CHIPSET(0x160E, bdw_gt1, "Intel(R) Broadwell GT1")
 11+CHIPSET(0x1612, bdw_gt2, "Intel(R) HD Graphics 5600 (Broadwell GT2)")
 12+CHIPSET(0x1616, bdw_gt2, "Intel(R) HD Graphics 5500 (Broadwell GT2)")
 13+CHIPSET(0x161A, bdw_gt2, "Intel(R) Broadwell GT2")
 14+CHIPSET(0x161B, bdw_gt2, "Intel(R) Broadwell GT2")
 15+CHIPSET(0x161D, bdw_gt2, "Intel(R) Broadwell GT2")
 16+CHIPSET(0x161E, bdw_gt2, "Intel(R) HD Graphics 5300 (Broadwell GT2)")
 17+CHIPSET(0x1622, bdw_gt3, "Intel(R) Iris Pro 6200 (Broadwell GT3e)")
 18+CHIPSET(0x1626, bdw_gt3, "Intel(R) HD Graphics 6000 (Broadwell GT3)")
 19+CHIPSET(0x162A, bdw_gt3, "Intel(R) Iris Pro P6300 (Broadwell GT3e)")
 20+CHIPSET(0x162B, bdw_gt3, "Intel(R) Iris 6100 (Broadwell GT3)")
 21+CHIPSET(0x162D, bdw_gt3, "Intel(R) Broadwell GT3")
 22+CHIPSET(0x162E, bdw_gt3, "Intel(R) Broadwell GT3")
 23+CHIPSET(0x22B0, chv,     "Intel(R) HD Graphics (Cherrytrail)")
 24+CHIPSET(0x22B1, chv,     "Intel(R) HD Graphics XXX (Braswell)") /* Overridden in brw_get_renderer_string */
 25+CHIPSET(0x22B2, chv,     "Intel(R) HD Graphics (Cherryview)")
 26+CHIPSET(0x22B3, chv,     "Intel(R) HD Graphics (Cherryview)")
 27+CHIPSET(0x1902, skl_gt1, "Intel(R) HD Graphics 510 (Skylake GT1)")
 28+CHIPSET(0x1906, skl_gt1, "Intel(R) HD Graphics 510 (Skylake GT1)")
 29+CHIPSET(0x190A, skl_gt1, "Intel(R) Skylake GT1")
 30+CHIPSET(0x190B, skl_gt1, "Intel(R) HD Graphics 510 (Skylake GT1)")
 31+CHIPSET(0x190E, skl_gt1, "Intel(R) Skylake GT1")
 32+CHIPSET(0x1912, skl_gt2, "Intel(R) HD Graphics 530 (Skylake GT2)")
 33+CHIPSET(0x1913, skl_gt2, "Intel(R) Skylake GT2f")
 34+CHIPSET(0x1915, skl_gt2, "Intel(R) Skylake GT2f")
 35+CHIPSET(0x1916, skl_gt2, "Intel(R) HD Graphics 520 (Skylake GT2)")
 36+CHIPSET(0x1917, skl_gt2, "Intel(R) Skylake GT2f")
 37+CHIPSET(0x191A, skl_gt2, "Intel(R) Skylake GT2")
 38+CHIPSET(0x191B, skl_gt2, "Intel(R) HD Graphics 530 (Skylake GT2)")
 39+CHIPSET(0x191D, skl_gt2, "Intel(R) HD Graphics P530 (Skylake GT2)")
 40+CHIPSET(0x191E, skl_gt2, "Intel(R) HD Graphics 515 (Skylake GT2)")
 41+CHIPSET(0x1921, skl_gt2, "Intel(R) HD Graphics 520 (Skylake GT2)")
 42+CHIPSET(0x1923, skl_gt3, "Intel(R) Skylake GT3e")
 43+CHIPSET(0x1926, skl_gt3, "Intel(R) Iris Graphics 540 (Skylake GT3e)")
 44+CHIPSET(0x1927, skl_gt3, "Intel(R) Iris Graphics 550 (Skylake GT3e)")
 45+CHIPSET(0x192A, skl_gt4, "Intel(R) Skylake GT4")
 46+CHIPSET(0x192B, skl_gt3, "Intel(R) Iris Graphics 555 (Skylake GT3e)")
 47+CHIPSET(0x192D, skl_gt3, "Intel(R) Iris Graphics P555 (Skylake GT3e)")
 48+CHIPSET(0x1932, skl_gt4, "Intel(R) Iris Pro Graphics 580 (Skylake GT4e)")
 49+CHIPSET(0x193A, skl_gt4, "Intel(R) Iris Pro Graphics P580 (Skylake GT4e)")
 50+CHIPSET(0x193B, skl_gt4, "Intel(R) Iris Pro Graphics 580 (Skylake GT4e)")
 51+CHIPSET(0x193D, skl_gt4, "Intel(R) Iris Pro Graphics P580 (Skylake GT4e)")
 52+CHIPSET(0x0A84, bxt,     "Intel(R) HD Graphics (Broxton)")
 53+CHIPSET(0x1A84, bxt,     "Intel(R) HD Graphics (Broxton)")
 54+CHIPSET(0x1A85, bxt_2x6, "Intel(R) HD Graphics (Broxton 2x6)")
 55+CHIPSET(0x5A84, bxt,     "Intel(R) HD Graphics 505 (Broxton)")
 56+CHIPSET(0x5A85, bxt_2x6, "Intel(R) HD Graphics 500 (Broxton 2x6)")
 57+CHIPSET(0x5902, kbl_gt1, "Intel(R) HD Graphics 610 (Kaby Lake GT1)")
 58+CHIPSET(0x5906, kbl_gt1, "Intel(R) HD Graphics 610 (Kaby Lake GT1)")
 59+CHIPSET(0x590A, kbl_gt1, "Intel(R) Kabylake GT1")
 60+CHIPSET(0x5908, kbl_gt1, "Intel(R) Kabylake GT1")
 61+CHIPSET(0x590B, kbl_gt1, "Intel(R) Kabylake GT1")
 62+CHIPSET(0x590E, kbl_gt1, "Intel(R) Kabylake GT1")
 63+CHIPSET(0x5913, kbl_gt1_5, "Intel(R) Kabylake GT1.5")
 64+CHIPSET(0x5915, kbl_gt1_5, "Intel(R) Kabylake GT1.5")
 65+CHIPSET(0x5917, kbl_gt1_5, "Intel(R) Kabylake GT1.5")
 66+CHIPSET(0x5912, kbl_gt2, "Intel(R) HD Graphics 630 (Kaby Lake GT2)")
 67+CHIPSET(0x5916, kbl_gt2, "Intel(R) HD Graphics 620 (Kaby Lake GT2)")
 68+CHIPSET(0x591A, kbl_gt2, "Intel(R) HD Graphics P630 (Kaby Lake GT2)")
 69+CHIPSET(0x591B, kbl_gt2, "Intel(R) HD Graphics 630 (Kaby Lake GT2)")
 70+CHIPSET(0x591D, kbl_gt2, "Intel(R) HD Graphics P630 (Kaby Lake GT2)")
 71+CHIPSET(0x591E, kbl_gt2, "Intel(R) HD Graphics 615 (Kaby Lake GT2)")
 72+CHIPSET(0x5921, kbl_gt2, "Intel(R) Kabylake GT2F")
 73+CHIPSET(0x5923, kbl_gt3, "Intel(R) Kabylake GT3")
 74+CHIPSET(0x5926, kbl_gt3, "Intel(R) Iris Plus Graphics 640 (Kaby Lake GT3)")
 75+CHIPSET(0x5927, kbl_gt3, "Intel(R) Iris Plus Graphics 650 (Kaby Lake GT3)")
 76+CHIPSET(0x593B, kbl_gt4, "Intel(R) Kabylake GT4")
 77+CHIPSET(0x3184, glk,     "Intel(R) HD Graphics (Geminilake)")
 78+CHIPSET(0x3185, glk_2x6, "Intel(R) HD Graphics (Geminilake 2x6)")
 79+CHIPSET(0x3E90, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
 80+CHIPSET(0x3E93, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
 81+CHIPSET(0x3E91, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
 82+CHIPSET(0x3E92, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
 83+CHIPSET(0x3E96, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
 84+CHIPSET(0x3E9B, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
 85+CHIPSET(0x3E94, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
 86+CHIPSET(0x3EA6, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
 87+CHIPSET(0x3EA7, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
 88+CHIPSET(0x3EA8, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
 89+CHIPSET(0x3EA5, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
 90+CHIPSET(0x5A49, cnl_2x8, "Intel(R) HD Graphics (Cannonlake 2x8 GT0.5)")
 91+CHIPSET(0x5A4A, cnl_2x8, "Intel(R) HD Graphics (Cannonlake 2x8 GT0.5)")
 92+CHIPSET(0x5A41, cnl_3x8, "Intel(R) HD Graphics (Cannonlake 3x8 GT1)")
 93+CHIPSET(0x5A42, cnl_3x8, "Intel(R) HD Graphics (Cannonlake 3x8 GT1)")
 94+CHIPSET(0x5A44, cnl_3x8, "Intel(R) HD Graphics (Cannonlake 3x8 GT1)")
 95+CHIPSET(0x5A59, cnl_4x8, "Intel(R) HD Graphics (Cannonlake 4x8 GT1.5)")
 96+CHIPSET(0x5A5A, cnl_4x8, "Intel(R) HD Graphics (Cannonlake 4x8 GT1.5)")
 97+CHIPSET(0x5A5C, cnl_4x8, "Intel(R) HD Graphics (Cannonlake 4x8 GT1.5)")
 98+CHIPSET(0x5A50, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)")
 99+CHIPSET(0x5A51, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)")
100+CHIPSET(0x5A52, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)")
101+CHIPSET(0x5A54, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)")

commit b4e902b

commit `b4e902b`